Smart Gate Drive Coupler: Comprehensive Protection For IGBTs in Inverter Applications

Smart gate drive couplers (SGDs) are key components for protecting power devices, especially insulated gate bipolar transistors (IGBTs), from overcurrent damage. This article will outline the operational design information of SGDs, especially for Toshiba's TLP5214A/TLP5214/TLP5212/TLP5222 models, which are known for their VCE(sat) detection function, Miller clamp function, and FAULT output function.

1. Comparison of SGD coupler products

Different models of SGD couplers vary in performance parameters, and these differences are crucial to choosing the right product. For example, the peak output current of the TLP5214A/TLP5214 models is ±4.0A, while the TLP5212/TLP5222 models is ±2.5A. Supply current and supply voltage are also important considerations, and the maximum values ​​of these parameters are 3.8mA, 3.5mA, and 5mA, and 15V to 30V, respectively. The threshold input current and DESAT threshold are also key to distinguishing different models, with a maximum value of 6mA and a typical value of 6.5V to 6.6V. In addition, the propagation delay, that is, the maximum delay time of the signal from input to output, ranges from 150ns to 250ns. As shown in Figure 1.1

2. Protection characteristics

The protection characteristics of the SGD coupler are its core functions, including UVLO (undervoltage lockout) function, VCE(sat) detection, active Miller clamping and fault output system. The UVLO function ensures that there is no accidental output when the supply voltage is lower than the threshold, while the VCE(sat) detection monitors the collector-emitter voltage of the IGBT and shuts down the operation to protect the device once an overcurrent is detected. The active Miller clamp reduces the potential increase between the gate and collector of the IGBT, while the fault output system outputs a fault signal to the main control side when a fault is detected. Overload is shown in Figure 1.2

3. Application design

In application design, multiple parameters need to be considered, including gate resistance, blanking time, short circuit monitoring and main side fault signal pull-up resistor. The blanking time setting and adjustment can be done by external blanking capacitor or circuit to adjust the timing of voltage detection sequence. The external blanking circuit (RB) uses an external resistor to increase the charging current of the blanking capacitor to ensure that the protection function is effective during the short circuit. The IGBT short circuit detection threshold voltage can be adjusted by adding a diode or a Zener diode. The analysis of gate capacitance, gate resistance and propagation delay shows the influence of these parameters on the propagation delay. The soft turn-off time is affected by the gate capacitance and output power voltage, while the proper treatment of bypass capacitors and standby terminals can avoid failure. The protection of the DESAT terminal from the voltage spike when the IGBT is switched can be achieved by adding a Zener diode or Schottky diode between the DESAT and VE terminals. In case of insufficient gate drive current, a buffer transistor can be added. LED signal waveform shaping is particularly important when the distance between the SGD coupler and the CPU is long, and the input signal waveform can be shaped by using a hysteresis buffer. Finally, the pull-up resistor RF of the fault signal on the main side is necessary for the fault signal output.

4. Key Design Considerations

When designing an SGD coupler, key factors to consider include gate resistance, separation of the drive circuit from the power device, bootstrap circuit diode, and gate-emitter resistance. These factors together affect the propagation delay, which has a maximum value between 150ns and 250ns.