STGAP2HSMTR

The STGAP2HSMTR isolation gate driver emerges as a formidable solution for high voltage applications, boasting a maximum voltage rail of 1200 V and a robust 4 A sink/source driver current capability at 25°C.

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Description

Technical Parameters

The STGAP2HSMTR performs well in dynamic environments with ±100 V/ns dV/dt transient immunity, fast 75 ns overall input-to-output propagation delay, and easy-to-configuration independent receiver and source options. Additional features such as 4 A Miller clamp, UVLO capability, 26 V gate drive voltage, and compatibility with 3.3 V and 5 V TTL/CMOS inputs with hysteresis enhance its versatility. Thermal shutdown protection, standby functionality, 6 kV galvanic isolation, UL 1577 certification and compact SO-8W packaging further solidify its position as a safe, efficient and innovative choice for a variety of industries and applications. Power Systems.

product-1267-1013

Related Products:

Mfr Part	STGAP2HSMTR
Description	DGTL ISO GATE DVR
Stock	30000
Product Status	Active
Technology	Capacitive Coupling
Number of Channels	1
Voltage-Isolation	5000Vrms
Common Mode Transient Immunity (Min)	100V/ns
Propagation Delay tpLH / tpHL (Max)	90ns, 90ns
Current - Output High, Low	4A, 4A
Voltage - Supply	9V ~ 26V
Operating Temperature	-40～C ~ 125～C
Package / Case	WSOP8
Package	Tape & Reel (TR)

Application：

• Motor driver for home appliances, factory automation, industrial drives and fans.

• 600/1200 V inverters

• Battery chargers

• Induction heating

• Welding

• UPS

• Power supply units

• DC-DC converters

• Power Factor Correction

Description:

The STGAP2HS is a single gate driver which provides galvanic isolation between the gate driving channel and the low voltage control and interface circuitry.

The gate driver is characterized by 4 A capability and rail-to-rail outputs, making the device also suitable for mid and high power applications such as power conversion and motor driver inverters in industrial applications. The device is available in two different configurations. The configuration with separated output pins allows to independently optimize turn-on and turn-off by using dedicated gate resistors. The configuration featuring single output pin and Miller CLAMP function prevents gate spikes during fast commutations in half-bridge topologies. Both configurations provide high flexibility and bill of material reduction for external components.

The device integrates UVLO and thermal shutdown protection functions to facilitate the design of highly reliable systems. Dual input pins allow the selection of signal polarity control and implementation of HW interlocking protection to avoid crossconduction in case of controller malfunction. The input to output propagation delay is less than 75 ns, which delivers high PWM control accuracy. A standby mode is available to reduce idle power consumption.

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UCC21220DR

STGAP2HSCMTR

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